Introduction

Since its seminal publication a year ago, this year has been busy and exciting on the LupIO front.

As a quick reminder, LupIO is a collection of educational I/O devices. Because of their straightforward and consistent specifications, these devices and their corresponding device drivers are meant to be easy to use, to understand, and to implement. The idea is that they can be used at all levels of higher education, but also in computer architecture and systems research, and even in the industry.

First collection of processor-agnostic I/O devices

The major news of the year is that, as assumed in our seminal paper, LupIO is the first processor-agnostic collection of I/O devices that can run an entire hardware SMP system.

We currently support two full systems, one based on RISC-V (which was our original prototype implementation last year) and one based on ARM32 (this one is brand new!). These two systems use exactly the same set of core LupIO devices ( PIC - Programmable interrupt controller, TMR - Timer, and IPI - Interprocessor interrupt controller) and peripheral LupIO devices (TTY - Terminal, BLK - Block device, RNG - Random number generator, RTC - Real-time clock, and SYS - System controller), and nothing else!

We also support one partial system, based on ARM64. Unfortunately, the ARM64 specs seem to mandate the presence of ARM GIC, which performs all the features of our PIC, TMR, and IPI LupIO devices. However, we were able to easily create an ARM64 system that otherwise used all of our peripheral LupIO devices.

A big part of this work was done in collaboration with Laura Hinman.

Integration in gem5

As mentioned in the News section last February, the LupIO collection of devices was integrated upstream in the research simulator gem5. Hopefully, this will enable the computer architecture research community to make good use of our LupIO devices.

This work was done by Laura Hinman and Melissa Jost, in collaboration with Jason Lowe-Power.

Port of xv6-riscv

Xv6 is an educational OS implemented by MIT folks, and derived from the illustrious Unix Version 6.

While Xv6 used to run on x86 hardware, the current version was ported to RISC-V and uses the RISC-V based virt machine on QEMU, which is not education-friendly :O

We therefore ported Xv6 to LupV, our RISC-V based system equipped only with LupIO devices, which greatly simplifies the implementation of Xv6. For example, there is no more insane VirtIO-disk device driver (409 SLOCs including the corresponding header), but instead a straightforward LupIO-BLK one (133 SLOCs).

The majority of this work was done by Kevin Peng.

Port to the latest QEMU 7.0.0

The port of our LupIO devices to the latest QEMU 7.0.0, which was released in April 2022, was fairly straightforward and even simpler than the port to the previous 6.1.0 version.

In version 6.1.0, we had to maintain a set of patches in order to fix the upstream implementation of RISC-V. The main issue was that the RISC-V processor model wasn’t presenting its IRQ lines in a generic way, therefore preventing us from writing generic I/O devices that could attach themselves on these IRQ lines. Now, in version 7.0.0, RISC-V declares its IRQ lines properly so this issue no longer exists.

On our new default development branch, you’ll find the LupIO devices and our three machines, LupA32 (ARM32 based), LupA64 (ARM64 based), and LupV (RISC-V based).

Port to the latest Linux v5.18

Similarly to QEMU, we recently updated our port to the latest available Linux release, namely v5.18 which came out in May 2022.

As with QEMU, this new version sees a much better, and more generic RISC-V support, which means that the number of required “fixes” was significantly reduced. However, we still need to maintain a set of patches, most notably to remove the requirement of having an SBI-compliant bootloader, therefore allowing Linux to run fully by itself on top of our Dumb Bootloader.

Our new default development branch runs on LupA32, LupA64, and LupV.

Future steps

At this point, the next major milestone will be the implementation of the LupIO collection into hardware! We are currently looking for an existing RISC-V based, and ideally SMP-ready, system that compiles onto an FPGA and can boot Linux, which we could then modify to implement our LupIO devices instead. From our research so far, such a system is not that easy to find…

In the meantime, we will try and spend some time advertising the project, as it’s only once the LupIO collection gets known by the community that we’ll have a shot at committing it upstream.